Currently, major semiconductor research and development institutions and enterprises around the world have carried out a lot of work on the SOT-MRAM etching process. However, the etching process of SOT-MRAM remains an important technical challenge faced by the industry.

 

Recently, the Institute of Microelectronics of the Chinese Academy of Sciences has made new progress in the key integration technology field of SOT-MRAM.

 

According to the "Institute of Microelectronics, Chinese Academy of Sciences", in order to better solve the problem of SOT-MRAM etching technology to achieve high density integration on the chip of SOT-MTJ, and at the same time to study the impact of different etching processes on the magnetoelectric characteristics of devices, Luo Jun, a research team of the Research Center of Integrated Circuit Pilot Process, Institute of Microelectronics, Chinese Academy of Sciences, developed an etching "stop MgO" process (SOMP-MTJ) based on vertical magnetic anisotropy SOT-MTJ, This process effectively solves the etching short circuit problem in SOT-MRAM manufacturing.

 

According to the news, the research group has developed an etching "stop MgO" process, which accurately stops the MTJ etching endpoint on a~1 nm thick MgO layer (Figure 1c, d). Due to the fact that the side walls of the tunneling layer MgO are never exposed, short circuits in the MgO layer are avoided. The SOT-MTJ device array prepared using the "stop MgO" etching process can increase the resistance yield of the wafer to 100%, while also improving the uniformity of key parameters such as TMR, resistance, coercivity of the device (Figure 2a, b).